2.8" QD Disk Emulation

[AMSynths]

A read data test trace is attached, the Ready signal is lagging behind the read data, which is how its shown in the Timing Diagram. It also de-asserts before the read has completed.

[AMSynths]

The Read cycle has a big pause of read data at the start followed by lots of smaller pauses before its a continuous data stream. I was not expected this...although the Timing Diagram does seem to show the main gap.

The read data is active as soon as the drive starts spinning (MO) and then Ready asserts, and the data keeps going for 7ms then stops for 20ms before getting into a read data stream which is not yet contiguous until 170ms.

Does the Gotek fw work in this way?

[Jeff]

The Read cycle has a big pause of read data at the start followed by lots of smaller pauses before its a continuous data stream. I was not expected this...although the Timing Diagram does seem to show the main gap.

The read data is active as soon as the drive starts spinning (MO) and then Ready asserts, and the data keeps going for 7ms then stops for 20ms before getting into a read data stream which is not yet contiguous until 170ms.

Does the Gotek fw work in this way?

That's interesting. But this is expected too : Because of the WG 168ms delay this part is probably not formatted and you read back noises. We can edit the track data in the QD file to mimic this if needed.
But i note that the real track data start is Ready + 168ms. I have a similar delay with the MO5 machine.

[Jeff]

The sample data extract should be at 30kHz which gives a very nearly full sample time of 1.098 seconds. Can GoldWave be set to 30k?

I think so. I can reconvert it if you want.
But anyway the sample data is for sure valid : the block CRC is valid !

[Jeff]

More tests with F1 and F2 saves shows the 1st glitch interrupts the write data stream as well. I was thinking that the early stages of the write data will be the 8kb of wave and performance parameters, followed by the sample data. But that doesn't make sense as the QD is only 64kB...

Yesterday i have checked the glitches positions on your captures and the block positions in the formatted QD : The glitches position match to the blocks header positions. the WG is unasserted then asserted right before starting a new block. The question is : Is it a programming side effect or is it intentional to produce something on the "tape" to use this as an sector index marker ?
What i miss is the QD controller MB87013 IC datasheet.

[Jeff]

Latest fw loaded. 000 and 003 give I/O Error 3 - S-10 Has Broken Down, with 002 giving Illegal QD. There was no 001.
Save still gives Verify Error. I will do some traces of the real QD

This is quite interesting ! We have finally something different !

Can you try to read these images ? :

delay.zip

(106.82 KiB) Downloaded 288 times

[AMSynths]

Both fail with Illegal QD

[Jeff]

Both fail with Illegal QD

ok and with these ?

(part 1)

delay2a.zip

(160.21 KiB) Downloaded 288 times

(part 2)

delay2b.zip

(106.82 KiB) Downloaded 295 times

[AMSynths]

They all fail - first 4 with Illegal QD immediately after the Check QD message on the sampler, and 0004 fails with I/O Error 3 at the same point.

[Jeff]

They all fail - first 4 with Illegal QD immediately after the Check QD message on the sampler, and 0004 fails with I/O Error 3 at the same point.

This is interesting because the only thing do is moving the ready signal on the track. Maybe that the S10 see something with the 0004 image but something else is failing. When i read the service manual i have the feeling that the S10 check QD the rotational speed/ready window. Unfortunally i don't find the Error 3 meaning in the service manual. But i will now set the ready duration to 4.5s.

[Jeff]

attached !

DSKA0000.zip

(53.42 KiB) Downloaded 267 times

[AMSynths]

Hi, I/O Error 3 is explained in the diagnostic section - "suspective QD" also cpu and MB89251 uSART chip

[Jeff]

Hi, I/O Error 3 is explained in the diagnostic section - "suspective QD" also cpu and MB89251 uSART chip

New try : Blanked/read pause added at the track beginning (track shifted and not shifted).

blanked_track_start.zip

(106.97 KiB) Downloaded 287 times

[AMSynths]

Fails with I/O Error 3...

[AMSynths]

There is some Famicom info here, not sure if you have seen it already...
https://nesdev.com/FDS%20technical%20reference.txt